Sculpt

Richard Granger, PhD, President Non-Von
Eli Bowen, PhD, CTO Non-Von

Non-Von chips reduce power costs by two orders of magnitude (100x) for the growing set of sparse, quantized AI systems.  Non-Von's power efficient chips both i) enable low-power untethered edge systems such as sensors, and ii) provide enormous power savings for server-level AI.
 
Current AI systems typically run on GPUs, first designed decades ago for screen graphics processing.  To work fast, GPUs rely on high power consumption, burdening current AI systems with immense electric budgets (1). Currently, many companies are scrambling to hire AI and data science coders, to construct or adapt large models, and then *lose money* on the resulting power bills.
 
Small parts of this burden can sometimes be alleviated with software changes alone.  Many companies are making systems sparse (reducing redundant data), and quantized or compacted (using lowest-precision encodings), such as BitNet and Hamiltonian Net (2).  
 
Orders of magnitude more savings arise by using non-GPU hardware that is directly fitted to these sparse and compacted software methods.  Some chips are designed for particular software examples, such as convolutional nets or transformers, but Non-Von's NV1 chip specifically targets the large and growing class of sparse compacted systems.
 
From first principles, Non-Von has designed a hardware-software solution called SCULPT - sparse compacted ultra low-power toolset for AI, "sculpting away" whatever the model does not need, refactoring it to take maximal advantage of Non-Von hardware.  Any existing model software can be SCULPTed with just a few lines of code, yielding large gains when implemented on Non-Von hardware.
 
By contrast, standard GPUs and von-Neumann architectures prevent efficient code execution, greatly adding to the costs of implementing and running large AI systems.  The Non-Von hardware-software SCULPT architecture allows AI designs that immediately run efficiently, with enormous cost savings.
 
Non-Von can take any trained model, including all common model development packages (Pytorch, ONNX, Tensorflow, Keras, SKLearn, and many more), and automatically convert it to a sparse compacted system implemented on silicon.  These can be printed as custom Non-Von silicon, or imprinted into Non-Von's mass-produced programmable AI accelerator boards.
 
The results are 100 times more power-efficient on tasks ranging from deep-learning-based visual recognition to transformer-based chatbots (3).  
 
 
 
1) AI electrical power usage:
   https://www.nature.com/articles/d41586-024-00478-x
   https://www.goldmansachs.com/insights/articles/AI-poised-to-drive-160-increase-in-power-demand    https://www.wsj.com/business/energy-oil/ai-is-about-to-boost-power-billswholl-take-heat-for-that-c527f27b?mod=panda_wsj_custom_topic_alert
   https://www.theatlantic.com/technology/archive/2024/03/ai-water-climate-microsoft/677602/ 
 
2) BitNet and Hamiltonian HNet (Quantization and sparsity)   
   https://huggingface.co/blog/1_58_llm_extreme_quantization
   https://arxiv.org/abs/2402.17764
   https://tinyurl.com/HNet2023  (AAAI 2023)
 
3) Hokenmeier et al. (2024) IEEE 33rd Microelectronics Design & Test Symposium (MDTS)
   doi.org/10.1109/MDTS61600.2024.10570137
   https://arxiv.org/abs/2409.19389